1. Field of the Invention
This invention relates generally to the structure and fabrication process for manufacturing the junction field effect transistors (JFET). More particularly, this invention relates to a novel device structure and fabrication process for manufacturing normally on or normally off JFET transistors with low on-resistance for low voltage and high current density applications.
2. Description of the Prior Art
The semiconductor industry now faces a difficult challenge to satisfy the ever increased needs for providing transistors suitable for power management with voltage under three-volts. As the feature sizes of the integrated circuits (ICs) are becoming ever smaller and electronic devices are continuously being miniaturized, the voltages from AC or DC power sources for providing power to these devices are further dropped. Dropping the voltage from five volts to three volts results in a 25:9 reduction in power if the current density is maintained unchanged. At 1.8 volts, the power drops another 60%. However, the transient current loads can be very high. Under such operation conditions, the normal forward voltage drop for a p-n junction typically employed in a rectifier is about 0.9 volts. Most of the power will be consumed in the rectifying process. Power supply systems built with such types of p-n junctions would no longer be suitable for the low voltage applications. Even the Schottky barrier diodes with a forward voltage drop below 0.5 volts would not be a suitable solution to provide rectifiers or power switching devices for operation under the low voltage conditions.
The concept of junction field effect transistors (JFETs) has been disclosed after the invention of the bipolar transistors. JFET transistor can be operated at very high frequency with high switching speed because the JFET transistors are operated with majority carriers. The JFET transistor are well known and employed commonly in a naturally on state when the gate bias is zero. Because of the naturally on state, the JFET transistors are not as widely used in the semiconductor industry as the MOSFET, i.e., the metal oxide semiconductor field effect transistors. In order to make the JFET transistors to operate in a naturally off state, the distance between the gates has to be reduced for the depletion regions from the gate to shut off the current conducting paths. Such naturally off JFET transistors are however not very useful in their conventional configurations due to the longer current channel thus limiting the current capacity with a high on-resistance. S. M. Sze in "Physics of Semiconductor Devices" disclosed one example of such configuration cohn Wiley & Son, 1981 Second Edition, page 322). The normally off JFET transistors discussed by Sze are for high speed low power applications. The long current channel and high-on resistance limit the usefulness of JFET transistors particularly the high on-resistance prevents such transistors for application in modern electronic devices operated with extreme low voltages.
In U.S. Pat. No. 4,523,111 entitled "Normally-Off Gate-Controlled Electric Circuit with Low On-Resistance", Baliga disclosed a JFET serially connected to an IGFET. The gate of IGFET is operated as the gate for the serially connected circuit. The gate of IGFET is applied to block the current to flow through a normally on JFET until the IGFET is turned on with a positively biased voltage above an IGFET threshold voltage. The on-resistance is the sum of the JFET resistance and the IGFET resistance. The on-resistance would not be adequate for extreme-low voltage applications required by modern electronic devices as discussed above. A similar invention is disclosed in U.S. Pat. No. 4,645,957 that is entitled "Normally Off Semiconductor Device with Low On-Resistance and Circuit Analogue" by Baliga. The JFET transistor is serially connected to a bipolar transistor to achieve the normally off state. Again, the on-resistance is the sum of the bipolar resistance and the JFET resistance and becomes too high for modern application to modern devices operated with extremely low voltages.
In U.S. Pat. No. 5,321,283 entitled "High Frequency JFET" Cogan et al. disclose a JFET for radio frequency (RF) operation at high frequency. The normally-on JFET transistors disclosed in this patent are operated with high voltage and not suitable to satisfy the requirements of modern portable electronic devices that require extremely low voltage and relatively high current capacity. Similarly, in U.S. Pat. No. 5,618,688 entitled "Method of Forming a Monolithic Semiconductor Integrated Circuit having an N-Channel JFET", Ruess et al disclose a normally on JFET transistor manufactured with BiCMOS processes. The JFET transistors disclosed in this patent are not suitable for low voltage and high current applications.
Therefore, a need still exits in the art of design and manufacture of transistor for low voltage power supply to provide a novel structural configuration and fabrication process that would resolve these difficulties. More specifically, it is preferably that the transistor for low voltage power supply has low on-resistance and high switching speed. It is further desirable to employ a simplified manufacture process to fabricate the power transistors such that highly reliable power transistors can be made available at a reasonably low production cost.